In a product such as a D/A converter required to have a high output voltage accuracy, there is a manufacturing variation in various devices such as resistors, transistors, etc. Due to the variation, it is very difficult for the manufactured product to attain the required accuracy as it is. It is therefore essential to feed back the properties measured after manufacturing, and to perform some kind of trimming on the manufactured product. Further, when the variation varies in accordance with data bit settings, the trimming range must be changed for each data bit. It is therefore effective to use a PROM having a mat configuration. Examples of fuses forming such PROMs include aluminum fuses that can be cut from the outside by a laser, polysilicon fuses that can be electrically cut or broken, anti-fuses using bipolar transistors, etc. It is, however, likely that the properties may change due to influence of heating or stress caused by packaging. It is therefore effective to use an electric fuse that can be cut or broken after packaging.
FIG. 18 shows a configuration view of an anti-fuse PROM using diodes. Description will be made about the write operation of the anti-fuse PROM using diodes. When a high voltage is applied between a word line PW and a data line PD, a reverse bias is applied to a diode transistor D1 so that a large current flows therein. As a result, the diode transistor D1 is destroyed and brought into a low resistance state, in which a low resistance connection is established between a node VM and the word line PW. This is the state of writing into the PROM. Next, description will be made about the read operation. The word line PW is set at high level, and the data line PD is connected to low level through a high resistance. In this event, when the PROM is not destroyed, the diode transistor D1 acts as a reverse bias diode so that the data line PD is brought into low level. On the other hand, when the PROM is destroyed, the voltage level of the data line PD is one-diode lower than the voltage level of the word line PW due to a diode transistor D2 because the diode transistor D1 has a low resistance.
With the advance of fine processing, it was found that when a large current was applied to the diode transistor D1 in order to destroy the diode transistor D1 in the diode type anti-fuse PROM used in the background art, the diode transistor D2 which was intended not to be destroyed was also destroyed. Prior to the present invention, the present inventor made a study of an anti-fuse PROM using bipolar transistors as shown in FIG. 19. Here, description will be made about the write operation of the PROM using bipolar transistors. When a high voltage is applied between a word line PW and a data line PD, a reverse bias is applied between the emitter and the collector of a bipolar transistor Q2 so that a large current flows therein. As a result, the emitter-base junction is destroyed and brought into a low resistance state, in which a low resistance connection is established between a node VM and the data line PD. This is the state of writing into the PROM. Next, description will be made about the read operation. The word line PW is set at high level, and the data line PD is connected to low level through a high resistance. In this event, when the PROM is not destroyed, the bipolar transistor Q2 acts as a reverse bias diode so that the data line PD is brought into low level. On the other hand, when the PROM is destroyed, the voltage level of the data line PD is lower than the voltage level of the word line PW by Vbe due to the diode connection of a bipolar transistor Q1 because the bipolar transistor Q2 has a low resistance.
The PROM having an anti-fuse configuration using bipolar transistors as described above has the following problems. First, there is a problem that a through current flows between the word line PW and the data line PD in the destroyed PROM portion whenever data are read. The larger the number of destroyed PROMs is, the larger the number of through currents is. If the number of PROMs reaches several thousands or several tens of thousands, the problem will be fatal. In this PROM configuration, the data line level in the destroyed PROM is lower than the high level by the voltage Vbe of the bipolar transistor Q2. Accordingly, if this level is received by the gate of a CMOS transistor as it is, a through current will flow into the reception-side CMOS transistor circuit. Thus, the power consumption will increase, or the normal operation will be prevented.
Further, when trimming is performed in an LSI using PROMs configured thus, first, measuring is performed with a tester or the like, and writing into the PROMs is performed based on the obtained information. However, as a result of writing into the PROMs, correction may be insufficient, or overcorrection may have been performed. In this case, improvement may be expected by rewriting, but written information cannot be restored. It may be therefore impossible to perform further correction on the LSI.